The present invention relates to a solid state image sensing device, and more specifically to a solid state image sensing device of multiline CCD (charge coupled device) register structure.
Recently, with the advance of higher resolution and higher speed of image reading devices, a multiline CCD image sensor has been known as an image sensor suitable for the image reading devices. An example of this image sensor is composed of a photoelectric transfer elements arranged in a straight line (each element of which corresponds to one pixel), a shift register, two-stage charge transfer sections (registers) composed of a plurality of CCDs, and an output section (buffer).
The signal charges generated by the photoelectric transfer elements are transferred to the charge transfer section via a shift gate at a predetermined timing and further transferred to the output section at another predetermined timing for conversion into voltage signals.
In this multiline CCD register structure, however, in case there exists defects in the charge transfer paths between the initial stage register and the succeeding stage register, charges tend to remain when being transferred between these registers. These remaining charges cause a factor of image defects. In addition, there exists such a tendency that a constant magnitude of charge remains only when the signal charge exceeds a predetermined level.
FIG. 1 shows the relationship between the signal charge generated by the photoelectric transfer section and output charge outputted after transferred between the two registers, in which 1 denotes the normal charge; 2 denotes the abnormal charge excluding the remaining charge, and 3 denotes the abnormal charge including the remaining charge. As shown in FIG. 1, when the magnitude of the signal charge is small, the relationship between both becomes non-linear characteristics, so that it has become difficult to correct the signal charges through signal processing.